/******************************************************************************
*  Generated by PSoC Designer 
******************************************************************************/
#include <m8c.h>
// AnalogOutBuf_0 address and mask defines
#pragma	ioport	AnalogOutBuf_0_Data_ADDR:	0x0
BYTE			AnalogOutBuf_0_Data_ADDR;
#pragma	ioport	AnalogOutBuf_0_DriveMode_0_ADDR:	0x100
BYTE			AnalogOutBuf_0_DriveMode_0_ADDR;
#pragma	ioport	AnalogOutBuf_0_DriveMode_1_ADDR:	0x101
BYTE			AnalogOutBuf_0_DriveMode_1_ADDR;
#pragma	ioport	AnalogOutBuf_0_DriveMode_2_ADDR:	0x3
BYTE			AnalogOutBuf_0_DriveMode_2_ADDR;
#pragma	ioport	AnalogOutBuf_0_GlobalSelect_ADDR:	0x2
BYTE			AnalogOutBuf_0_GlobalSelect_ADDR;
#pragma	ioport	AnalogOutBuf_0_IntCtrl_0_ADDR:	0x102
BYTE			AnalogOutBuf_0_IntCtrl_0_ADDR;
#pragma	ioport	AnalogOutBuf_0_IntCtrl_1_ADDR:	0x103
BYTE			AnalogOutBuf_0_IntCtrl_1_ADDR;
#pragma	ioport	AnalogOutBuf_0_IntEn_ADDR:	0x1
BYTE			AnalogOutBuf_0_IntEn_ADDR;
#define AnalogOutBuf_0_MASK 0x8
// AnalogOutBuf_2 address and mask defines
#pragma	ioport	AnalogOutBuf_2_Data_ADDR:	0x0
BYTE			AnalogOutBuf_2_Data_ADDR;
#pragma	ioport	AnalogOutBuf_2_DriveMode_0_ADDR:	0x100
BYTE			AnalogOutBuf_2_DriveMode_0_ADDR;
#pragma	ioport	AnalogOutBuf_2_DriveMode_1_ADDR:	0x101
BYTE			AnalogOutBuf_2_DriveMode_1_ADDR;
#pragma	ioport	AnalogOutBuf_2_DriveMode_2_ADDR:	0x3
BYTE			AnalogOutBuf_2_DriveMode_2_ADDR;
#pragma	ioport	AnalogOutBuf_2_GlobalSelect_ADDR:	0x2
BYTE			AnalogOutBuf_2_GlobalSelect_ADDR;
#pragma	ioport	AnalogOutBuf_2_IntCtrl_0_ADDR:	0x102
BYTE			AnalogOutBuf_2_IntCtrl_0_ADDR;
#pragma	ioport	AnalogOutBuf_2_IntCtrl_1_ADDR:	0x103
BYTE			AnalogOutBuf_2_IntCtrl_1_ADDR;
#pragma	ioport	AnalogOutBuf_2_IntEn_ADDR:	0x1
BYTE			AnalogOutBuf_2_IntEn_ADDR;
#define AnalogOutBuf_2_MASK 0x10
// MMC_CS address and mask defines
#pragma	ioport	MMC_CS_Data_ADDR:	0x8
BYTE			MMC_CS_Data_ADDR;
#pragma	ioport	MMC_CS_DriveMode_0_ADDR:	0x108
BYTE			MMC_CS_DriveMode_0_ADDR;
#pragma	ioport	MMC_CS_DriveMode_1_ADDR:	0x109
BYTE			MMC_CS_DriveMode_1_ADDR;
#pragma	ioport	MMC_CS_DriveMode_2_ADDR:	0xb
BYTE			MMC_CS_DriveMode_2_ADDR;
#pragma	ioport	MMC_CS_GlobalSelect_ADDR:	0xa
BYTE			MMC_CS_GlobalSelect_ADDR;
#pragma	ioport	MMC_CS_IntCtrl_0_ADDR:	0x10a
BYTE			MMC_CS_IntCtrl_0_ADDR;
#pragma	ioport	MMC_CS_IntCtrl_1_ADDR:	0x10b
BYTE			MMC_CS_IntCtrl_1_ADDR;
#pragma	ioport	MMC_CS_IntEn_ADDR:	0x9
BYTE			MMC_CS_IntEn_ADDR;
#define MMC_CS_MASK 0x1
// MMC_CLK address and mask defines
#pragma	ioport	MMC_CLK_Data_ADDR:	0x8
BYTE			MMC_CLK_Data_ADDR;
#pragma	ioport	MMC_CLK_DriveMode_0_ADDR:	0x108
BYTE			MMC_CLK_DriveMode_0_ADDR;
#pragma	ioport	MMC_CLK_DriveMode_1_ADDR:	0x109
BYTE			MMC_CLK_DriveMode_1_ADDR;
#pragma	ioport	MMC_CLK_DriveMode_2_ADDR:	0xb
BYTE			MMC_CLK_DriveMode_2_ADDR;
#pragma	ioport	MMC_CLK_GlobalSelect_ADDR:	0xa
BYTE			MMC_CLK_GlobalSelect_ADDR;
#pragma	ioport	MMC_CLK_IntCtrl_0_ADDR:	0x10a
BYTE			MMC_CLK_IntCtrl_0_ADDR;
#pragma	ioport	MMC_CLK_IntCtrl_1_ADDR:	0x10b
BYTE			MMC_CLK_IntCtrl_1_ADDR;
#pragma	ioport	MMC_CLK_IntEn_ADDR:	0x9
BYTE			MMC_CLK_IntEn_ADDR;
#define MMC_CLK_MASK 0x4
// MMC_DO address and mask defines
#pragma	ioport	MMC_DO_Data_ADDR:	0x8
BYTE			MMC_DO_Data_ADDR;
#pragma	ioport	MMC_DO_DriveMode_0_ADDR:	0x108
BYTE			MMC_DO_DriveMode_0_ADDR;
#pragma	ioport	MMC_DO_DriveMode_1_ADDR:	0x109
BYTE			MMC_DO_DriveMode_1_ADDR;
#pragma	ioport	MMC_DO_DriveMode_2_ADDR:	0xb
BYTE			MMC_DO_DriveMode_2_ADDR;
#pragma	ioport	MMC_DO_GlobalSelect_ADDR:	0xa
BYTE			MMC_DO_GlobalSelect_ADDR;
#pragma	ioport	MMC_DO_IntCtrl_0_ADDR:	0x10a
BYTE			MMC_DO_IntCtrl_0_ADDR;
#pragma	ioport	MMC_DO_IntCtrl_1_ADDR:	0x10b
BYTE			MMC_DO_IntCtrl_1_ADDR;
#pragma	ioport	MMC_DO_IntEn_ADDR:	0x9
BYTE			MMC_DO_IntEn_ADDR;
#define MMC_DO_MASK 0x40
// MMC_DI address and mask defines
#pragma	ioport	MMC_DI_Data_ADDR:	0x8
BYTE			MMC_DI_Data_ADDR;
#pragma	ioport	MMC_DI_DriveMode_0_ADDR:	0x108
BYTE			MMC_DI_DriveMode_0_ADDR;
#pragma	ioport	MMC_DI_DriveMode_1_ADDR:	0x109
BYTE			MMC_DI_DriveMode_1_ADDR;
#pragma	ioport	MMC_DI_DriveMode_2_ADDR:	0xb
BYTE			MMC_DI_DriveMode_2_ADDR;
#pragma	ioport	MMC_DI_GlobalSelect_ADDR:	0xa
BYTE			MMC_DI_GlobalSelect_ADDR;
#pragma	ioport	MMC_DI_IntCtrl_0_ADDR:	0x10a
BYTE			MMC_DI_IntCtrl_0_ADDR;
#pragma	ioport	MMC_DI_IntCtrl_1_ADDR:	0x10b
BYTE			MMC_DI_IntCtrl_1_ADDR;
#pragma	ioport	MMC_DI_IntEn_ADDR:	0x9
BYTE			MMC_DI_IntEn_ADDR;
#define MMC_DI_MASK 0x80
